Evaluation Packages

If you would like to take a closer look at the RACORS processors, here are some evaluation packages for downloading, one for the sf16 family, one for the sf20 family and one for the sf32 family. The packages have the following content:

  • Standalone Assembler

  • Instruction set simulator

  • Cycle accurate simulators for processor implementations

  • Documentation of processors and tools

  • Tutorial with a small example software project

  • Synthesizable RTL code of a processor implementation

  • Licensing/Disclaimer file

The free of charge packages and all of their content are provided as is with no guarantees, warranty or support. For details check the licensing filelicense.txt which is also contained in each package.

The packages are available as tarballs in two formats: one for cygwin, a Linux environment for PCs with Windows OS and one for PCs with native Linux. OS.

Free processor cores

The evaluation packages include synthesizable RTL code of the ultralight implementation of the respective family's base ISA. These IP blocks may be used free of charge in commercial and non-commercial applications.

Package Download

sf16_eval1_cygwin_20Jan14 (contains free sf16bu)

sf16_eval1_linux_20Jan14 (contains free sf16bu)

sf20_eval1_cygwin_22Dec14 (contains free sf20bu)

sf20_eval1_linux_22Dec14 (contains free sf20bu)

sf32_eval1_cygwin_20Jan14 (contains free sf32bu)

sf32_eval1_linux_20Jan14 (contains free sf32bu)